MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 569

• Manufacturer Part Number: MCF5282CVM66
• Manufacturer: Freescale

Specifications of MCF5282CVM66

• Cpu Family: MCF528x
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Interface Type: CAN/I2C/QSPI/UART
• Total Internal Ram Size: 64KB
• # I/os (max): 150
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 3.3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: MA-BGA
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Figure 28-18
is selected, none of the MA signals can be used for analog or digital inputs. They become multiplexed
address outputs and are unaffected by DDRQA[1:0].
28.7.2.2 Module Version Options
The number of available analog channels varies, depending on whether external multiplexing is used. A
maximum of eight analog channels are supported by the internal multiplexing circuitry of the converter.
Table 28-21
chips.
28.7.3
This section describes the QADC analog subsystem, which includes the front-end analog multiplexer and
analog-to-digital converter.
28.7.3.1 Analog-to-Digital Converter Operation
The analog subsystem consists of the path from the input signals to the A/D converter block. Signals from
the queue control logic are fed to the multiplexer and state machine. The end-of-conversion (EOC) signal
and the successive approximation register (SAR) reflect the result of the conversion.
a block diagram of the QADC analog subsystem.
Freescale Semiconductor
Analog Subsystem
shows the total number of analog input channels supported with 0 to 4 external multiplexer
1
2
shows that the two MA signals may also be analog input signals. When external multiplexing
No External Mux
The external trigger inputs are not shared with two analog input signals.
When external multiplexing is used, two input channels are configured as multiplexed address
outputs, and for each external multiplexer chip, one input channel is a multiplexed analog input.
8
Directly Connected + External Multiplexed = Total Channels
One External
Number of Analog Input Channels Available
5 + 4 = 9
Mux
Table 28-21. Analog Input Channels
Two External
4 + 8 = 12
Muxes
Three External
3 + 12 = 15
Muxes
Queued Analog-to-Digital Converter (QADC)
1, 2
Four External
2 + 16 = 18
Muxes
Figure 28-19
shows
28-31