MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 266
MCF5282CVM66
Manufacturer Part Number
MCF5282CVM66
Description
Manufacturer
Freescale
Datasheet
1.MCF5282CVM66.pdf
(766 pages)
Specifications of MCF5282CVM66
Cpu Family
MCF528x
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Interface Type
CAN/I2C/QSPI/UART
Total Internal Ram Size
64KB
# I/os (max)
150
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
3.3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
MA-BGA
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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Signal Descriptions
2
14.2.9
I
C Signals
2
The I
C module acts as a two-wire, bidirectional serial interface between the processor and peripherals
2
with an I
C interface (such as LCD controller, A-to-D converter, or D-to-A converter). Devices connected
2
to the I
C must have open-drain or open-collector outputs.
14.2.9.1 Serial Clock (SCL)
2
2
This bidirectional open-drain signal is the clock signal for the I
C interface. Either it is driven by the I
C
2
module when the bus is in the master mode or it becomes the clock input when the I
C is in the slave mode.
This pin can also be configured as GPIO PAS0 or UTXD2.
14.2.9.2 Serial Data (SDA)
2
This bidirectional open-drain signal is the data input/output for the I
C interface.
This pin can also be configured as GPIO PAS1 or URXD2.
14.2.10 UART Module Signals
The signals in the following sections are used to transfer serial data between three UART modules and
external peripherals.
14.2.10.1 Transmit Serial Data Output (UTXD[2:0])
UTXD[2:0] are the transmitter serial data outputs for the UART modules. The output is held high (mark
condition) when the transmitter is disabled, idle, or in the local loopback mode. Data is shifted out, lsb
first, on this pin at the falling edge of the serial clock source.
The UTXD[1:0] pins can be configured as GPIO ports PUA2 and PUA0. The UTXD2 output is offered on
3 pins and is a secondary function of the EMDC/ GPIO port PAS4 pin, CANTX/GPIO port PAS2 pin, and
SCL/GPIO port PAS0 pin.
14.2.10.2 Receive Serial Data Input (URXD[2:0])
URXD[2:0] are the receiver serial data inputs for the UART modules. Data received on these pins is
sampled on the rising edge of the serial clock source lsb first. When the UART clock is stopped for
power-down mode, any transition on this pin restarts it.
The URXD[1:0] pins can be configured as GPIO ports PUA3 and PUA1. The URXD2 input is offered on
3 pins and is a secondary function of the EMDIO/GPIO port PAS5 pin, CANRX/GPIO port PAS3 pin, and
SDA/GPIO port PAS1 pin.
14.2.10.3 Clear-to-Send (UCTS[1:0])
The UCTS[1:0] signals are the clear-to-send (CTS) inputs, indicating to the UART modules that they can
begin data transmission.
The UCTS[1:0] inputs are each offered as secondary functions on four pins--DTIN2, DTOUT2, DTIN0
and DTOUT0.
14-26
Freescale Semiconductor
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