MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 583

MCF5282CVM66

Manufacturer Part Number
MCF5282CVM66
Description
Manufacturer
Freescale
Datasheet

Specifications of MCF5282CVM66

Cpu Family
MCF528x
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Interface Type
CAN/I2C/QSPI/UART
Total Internal Ram Size
64KB
# I/os (max)
150
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
3.3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
MA-BGA
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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28.8.2
The queue operation boundary conditions are:
Freescale Semiconductor
The first CCW in a queue specifies channel 63, the end-of-queue (EOQ) code. The queue becomes
active and the first CCW is read. The end-of-queue is recognized, the completion flag is set, and
the queue becomes idle. A conversion is not performed.
BQ2 (beginning of queue 2) is set at the end of the CCW table (63) and a trigger event occurs on
queue 2. The end-of-queue condition is recognized, a conversion is performed, the completion flag
is set, and the queue becomes idle.
BQ2 is set to CCW0 and a trigger event occurs on queue 1. After reading CCW0, the end-of-queue
condition is recognized, the completion flag is set, and the queue becomes idle. A conversion is not
performed.
Boundary Conditions
Q2:
TRIGGER CAPTURED, RESPONSE DELAYED AFTER FREEZE
T2
Q1:
C1
T1
Q2:
C1
C2
T2
C1
C2
T2
C3
C2
Figure 28-39. CCW Freeze Situation 17
Figure 28-40. CCW Freeze Situation 18
Figure 28-41. CCW Freeze Situation 19
C3
C4
Q1:
PF2
T1
C1
TRIGGERS IGNORED
T2
C2
FREEZE
FREEZE
FREEZE
C4
Q2:
CF1
C1
Queued Analog-to-Digital Converter (QADC)
C3
T2
C2
C3
C4
C3
CF1
C4
CF2
C4
C4
CF2
CF2
28-45

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