MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 342

• Manufacturer Part Number: MCF5282CVM66
• Manufacturer: Freescale

Specifications of MCF5282CVM66

• Cpu Family: MCF528x
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Interface Type: CAN/I2C/QSPI/UART
• Total Internal Ram Size: 64KB
• # I/os (max): 150
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 3.3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: MA-BGA
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Fast Ethernet Controller (FEC)
17.5.4
In the FEC, the descriptor control RISC initializes some registers after ECR[ETHER_EN] is asserted.
After the microcontroller initialization sequence is complete, hardware is ready for operation.
Table 17-34
17.5.5
After setting ECR[ETHER_EN], you can set up the buffer/frame descriptors and write to TDAR and
RDAR. Refer to
17.5.6
The FEC supports an MII interface for 10/100 Mbps Ethernet and a 7-wire serial interface for 10 Mbps
Ethernet. The RCR[MII_MODE] bit select the interface mode. In MII mode (RCR[MII_MODE] set),
there are 18 signals defined by the IEEE 802.3 standard and supported by the EMAC.
these signals.
17-32
Microcontroller Initialization
User Initialization (After Setting ECR[ETHER_EN])
Network Interface Options
shows microcontroller initialization operations.
Table 17-33. FEC User Initialization (Before ECR[ETHER_EN]) (continued)
Section 17.5.1, “Buffer Descriptors,”
Table 17-34. Microcontroller Initialization
Signal Description
Transmit Enable
Transmit Clock
Initialize (Empty) Transmit Descriptor ring
Transmit Error
Transmit Data
Initialize (Empty) Receive Descriptor ring
Initialize BackOff Random Number Seed
Initialize FIFO Count Registers
Initialize Transmit Ring Pointer
Initialize Receive Ring Pointer
Table 17-35. MII Mode
Clear Transmit FIFO
Clear Receive FIFO
Activate Transmitter
Activate Receiver
Description
Description
for more details.
FEC_TXD[3:0]
FEC_TXCLK
FEC_TXEN
FEC_TXER
EMAC pin
Freescale Semiconductor
Table 17-35
shows