MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 572

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MC9S12XDT512CAA

Manufacturer Part Number
MC9S12XDT512CAA
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDT512CAA

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Chapter 15 Background Debug Module (S12XBDMV2)
15.2
A single-wire interface pin called the background debug interface (BKGD) pin is used to communicate
with the BDM system. During reset, this pin is a mode select input which selects between normal and
special modes of operation. After reset, this pin becomes the dedicated serial interface pin for the
background debug mode.
15.3
15.3.1
Table 15-1
572
External Signal Description
Memory Map and Register Definition
shows the BDM memory map when BDM is active.
Module Memory Map
0x7FFF0C–0x7FFF0E
0x7FFF00–0x7FFF0B
0x7FFF10–0x7FFFFF
Global Address
0x7FFF0F
MC9S12XDP512 Data Sheet, Rev. 2.21
Table 15-1. BDM Memory Map
Family ID (part of BDM firmware ROM)
BDM firmware ROM
BDM firmware ROM
BDM registers
Module
Freescale Semiconductor
(Bytes)
Size
240
12
3
1

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