MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 446

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MC9S12XDT512CAA

Manufacturer Part Number
MC9S12XDT512CAA
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDT512CAA

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
Figure 10-24
identifiers. The mapping of standard identifiers into the IDR registers is shown in
All bits of the receive and transmit buffers are ‘x’ out of reset because of RAM-based implementation
All reserved or unused bits of the receive and transmit buffers always read ‘x’.
1. Exception: The transmit priority registers are 0 out of reset.
446
1
2
3
Not applicable for receive buffers
Read-only for CPU
Read-only for CPU
shows the common 13-byte data structure of receive and transmit buffers for extended
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure
Freescale Semiconductor
10-25.
1
.

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