MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 1305
MC9S12XDT512CAA
Manufacturer Part Number
MC9S12XDT512CAA
Description
Manufacturer
Freescale
Datasheet
1.MC9S12XDT512CAA.pdf
(1348 pages)
Specifications of MC9S12XDT512CAA
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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E.7
Freescale Semiconductor
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A/D is the number of modules/total number of A/D channels.
I/O is the sum of ports capable to act as digital input or output.
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CAN0 can be routed under software control from PM[1:0] to pins PM[3:2] or PM[5:4] or PJ[7:6].
CAN4 pins are shared between IIC0 pins.
CAN4 can be routed under software control from PJ[7:6] to pins PM[5:4] or PM[7:6].
Versions with 4 CAN modules will have CAN0, CAN1, CAN2 and CAN4
Versions with 3 CAN modules will have CAN0, CAN1 and CAN4.
Versions with 2 CAN modules will have CAN0 and CAN4.
Versions with 1 CAN modules will have CAN0
Versions with 2 SPI modules will have SPI0 and SPI1.
Versions with 4 SCI modules will have SCI0, SCI1, SCI2 and SCI4.
Versions with 2 SCI modules will have SCI0 and SCI1.
Versions with 1 IIC module will have IIC0.
SPI0 can be routed to either Ports PS[7:4] or PM[5:2].
SPI1 pins are shared with PWM[3:0]; In 144 and 112-pin versions, SPI1 can be routed under
software control to PH[3:0].
SPI2 pins are shared with PWM[7:4]; In 144 and 112-pin versions, SPI2 can be routed under
software control to PH[7:4]. In 80-pin packages, SS-signal of SPI2 is not bonded out!
Pinout explanations:
144 Pin Packages:
Port A = 8, B = 8, C=8, D=8, E = 6 + 2 input only,
H = 8, J = 7, K = 8, M = 8, P = 8, S = 8, T = 8, PAD = 24
25 inputs provide Interrupt capability (H =8, P= 8, J = 7, IRQ, XIRQ)
112 Pin Packages:
Port A = 8, B = 8, E = 6 + 2 input only, H = 8, J = 4, K = 7, M = 8, P = 8, S = 8, T = 8, PAD = 16
22 inputs provide Interrupt capability (H =8, P= 8, J = 4, IRQ, XIRQ)
80 Pin Packages:
Port A = 8, B = 8, E = 6 + 2 input only, J = 2, M = 6, P = 7, S = 4, T = 8, PAD = 8
11 inputs provide Interrupt capability (P= 7, J = 2, IRQ, XIRQ)
MC9S12XDP512 Data Sheet, Rev. 2.21
Appendix E Derivative Differences
1307
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