MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 214
MC9S12XDT512CAA
Manufacturer Part Number
MC9S12XDT512CAA
Description
Manufacturer
Freescale
Datasheet
1.MC9S12XDT512CAA.pdf
(1348 pages)
Specifications of MC9S12XDT512CAA
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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Chapter 6 XGATE (S12XGATEV2)
6.8.2.5
This addressing mode is used to identify the position and size of a bit field for insertion or extraction. The
width and offset are coded in the lower byte of the source register 2, RS2. The content of the upper byte is
ignored. An offset of 0 denotes the right most position and a width of 0 denotes 1 bit. These instructions
are very useful to extract, insert, clear, set or toggle portions of a 16 bit word.
6.8.2.6
The XGATE offers a number of additional instructions for flag manipulation, program flow control and
debugging:
214
1. SIF: Set a channel interrupt flag
2. SSEM: Test and set a hardware semaphore
3. CSEM: Clear a hardware semaphore
4. BRK: Software breakpoint
5. NOP: No Operation
6. RTS: Terminate the current thread
BFEXT
Bit Field Operations
Special Instructions for DMA Usage
15
15
R3,R4,R5 ; R5: W4 bits offset O4, will be extracted from R4 into R3
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure 6-23. Bit Field Addressing
Bit Field Insert
W4
W4=3, O4=2
5
3
2
O4
Bit Field Extract
0
0
RS2
RS1
RD
Freescale Semiconductor
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