HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 826

MPU 1.5/3.3V 0K I-TEMP PB-FREE 2

HD6417750RF200DV

Manufacturer Part Number
HD6417750RF200DV
Description
MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF200DV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.35 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF200DV
Manufacturer:
FREESCALE
Quantity:
450
Section 16 Serial Communication Interface with FIFO (SCIF)
Bit 5—Transmit FIFO Data Empty (TDFE): Indicates that data has been transferred from
SCFTDR2 to SCTSR2, the number of data bytes in SCFTDR2 has fallen to or below the transmit
trigger data number set by bits TTRG1 and TTRG0 in the FIFO control register (SCFCR2), and
new transmit data can be written to SCFTDR2.
Bit 5: TDFE
0
1
Note:
Rev.7.00 Oct. 10, 2008 Page 740 of 1074
REJ09B0366-0700
*
As SCFTDR2 is a 16-byte FIFO register, the maximum number of bytes that can be
written when TDFE = 1 is 16 - (transmit trigger set number). Data written in excess of
this will be ignored.
The number of data bytes in SCFTDR2 is indicated by the upper bits of SCFDR2.
Description
A number of transmit data bytes exceeding the transmit trigger set number
have been written to SCFTDR2
[Clearing conditions]
The number of transmit data bytes in SCFTDR2 does not exceed the
transmit trigger set number
[Setting conditions]
When transmit data exceeding the transmit trigger set number is written
to SCFTDR2 after reading TDFE = 1, and 0 is written to TDFE
When transmit data exceeding the transmit trigger set number is written
to SCFTDR2 by the DMAC
Power-on reset or manual reset
When the number of SCFTDR2 transmit data bytes falls to or below the
transmit trigger set number as the result of a transmit operation*
(Initial value)

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