HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 47

MPU 1.5/3.3V 0K I-TEMP PB-FREE 2

HD6417750RF200DV

Manufacturer Part Number
HD6417750RF200DV
Description
MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF200DV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.35 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF200DV
Manufacturer:
FREESCALE
Quantity:
450
Item
E.1 Pin States
Table E.1 Pin States in
Reset, Power-Down
State, and Bus-
Released State
Page
1035,
1036
Revision (See Manual for Details)
PI: Input (Pulled Up)
PZ: High-impedance (Pulled Up)
Notes: 1. Output when area 2 is used as DRAM.
2. Output when area 5 is used as PCMCIA.
3. Output when area 6 is used as PCMCIA.
4. Z (I) or O on refresh operations, depending on
5. Depends on refresh operations.
6. Z (I) or H (state held), depending on register setting
7. Z or O, depending on register setting (STBCR.PHZ).
8. Output when refreshing is set.
9. Operation in respective state when CKIO2ENB = 0
10. PZ or O, depending on register setting
11. Pulled up or not pulled up, depending on register
12. Pulled up or not pulled up, depending on register
13. Pulled up or not pulled up, depending on register
14. Pulled up with a built-in pull-up resistance. However
15. Output when refreshing is set (SH7750R only).
16. Z or O, depending on register setting
17. Z or O, depending on register setting (TOCR,
18. Output state held when used as port.
19. Pulled up or not pulled up, depending on register
20. Z when CKIO2ENB = 1
21. BGA Package only.
22. Depends on Emulator operations.
register setting (BCR1.HIZCNT).
(BCR1.HIZMEM).
(SH7750/SH7750S) (High-level outputs as
SH7750R).
(FRQCR.CKOEN).
setting (STBCR.PPU).
setting (BCR1.IPUP).
setting (BCR1.OPUP).
it, cannot use for fixation of an input MD pin at the
time of power-on reset. Pull up or down outside this
LSI.
(STBCR2.STHZ) (SH7750R only).
TCOE)
setting (BCR1.DPUP) (SH7750R only).
Rev.7.00 Oct. 10, 2008 Page xlv of lxxxiv
REJ09B0366-0700

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