HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 178

MPU 1.5/3.3V 0K I-TEMP PB-FREE 2

HD6417750RF200DV

Manufacturer Part Number
HD6417750RF200DV
Description
MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF200DV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.35 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750RF200DV
Manufacturer:
FREESCALE
Quantity:
450
Section 3 Memory Management Unit (MMU)
Rev.7.00 Oct. 10, 2008 Page 92 of 1074
REJ09B0366-0700
Access prohibited
Instruction TLB
miss exception
Search UTLB
Match?
VA is
in P4 area
Instruction TLB protection
violation exception
No
No
Figure 3.11 Flowchart of Memory Access Using ITLB
Yes
VA is
in P2 area
0
VPNs match
Record in ITLB
Instruction access to virtual address (VA)
and V = 1
Hardware ITLB
miss handling
Yes
CCR.ICE?
0
VA is
in P1 area
1
and CCR.ICE = 1
Cache access
C = 1
PR?
1
0 (User)
Yes
No
No
No
and (MMUCR.SV = 0 or
and ASIDs match and
MMUCR.AT = 1
entry matches
VPNs match
SR.MD = 0)
No
Only one
SR.MD?
SH = 0
V = 1
1 (Privileged)
Yes
Yes
Yes
Yes
VA is in P0, U0,
or P3 area
Memory access
(Non-cacheable)
multiple hit exception
Instruction TLB
No

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