ATTINY2313A-PU Atmel, ATTINY2313A-PU Datasheet - Page 53

• Manufacturer Part Number: ATTINY2313A-PU
• Description: IC MCU AVR 2K FLASH 20MHZ 20DIP
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY2313A-PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: ATTINY2x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 18
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• Controller Family/series: ATtiny
• No. Of I/o's: 18
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.3.6
8246A–AVR–11/09
PCMSK0 – Pin Change Mask Register 0
• Bits 7:3 – Res: Reserved Bits
These bits are reserved and will always read as zero.
• Bits 2..0 – PCINT10..8: Pin Change Enable Mask 10..8
Each PCINT10..8 bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT10..8 is set and the PCIE1 bit in GIMSK is set, pin change interrupt is enabled on
the corresponding I/O pin. If PCINT10..8 is cleared, pin change interrupt on the corresponding
I/O pin is disabled.
• Bits 7..0 – PCINT7..0: Pin Change Enable Mask 7..0
Each PCINT7..0 bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT7..0 is set and the PCIE0 bit in GIMSK is set, pin change interrupt is enabled on the
corresponding I/O pin. If PCINT7..0 is cleared, pin change interrupt on the corresponding I/O pin
is disabled.
Bit
0x20 (0x40)
Read/Write
Initial Value
PCINT7
R/W
7
0
PCINT6
R/W
6
0
PCINT5
R/W
5
0
PCINT4
R/W
4
0
PCINT3
R/W
3
0
PCINT2
R/W
2
0
PCINT1
R/W
1
0
PCINT0
R/W
0
0
PCMSK0
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