MC56F8367EVME Freescale Semiconductor, MC56F8367EVME Datasheet - Page 39
MC56F8367EVME
Manufacturer Part Number
MC56F8367EVME
Description
EVAL BOARD FOR MC56F83X
Manufacturer
Freescale Semiconductor
Type
DSPr
Specifications of MC56F8367EVME
Contents
Module and Misc Hardware
Processor To Be Evaluated
MC56F8145-67 and MC56F8345-67
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
56800/E
Core Sub-architecture
56800/E
Silicon Core Number
MC56F
Silicon Family Name
MC56F83xx
Rohs Compliant
Yes
For Use With/related Products
MC56F83x5, MC56F83x6, MC56F83x7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Part 3 On-Chip Clock Synthesis (OCCS)
3.1 Introduction
Refer to the OCCS chapter of the 56F8300 Peripheral User Manual for a full description of the OCCS.
The material contained here identifies the specific features of the OCCS design.
specific OCCS block diagram to reference in the OCCS chapter of the 56F8300 Peripheral User Manual.
3.2 External Clock Operation
The system clock can be derived from an external crystal, ceramic resonator, or an external system clock
signal. To generate a reference frequency using the internal oscillator, a reference crystal or ceramic
resonator must be connected between the EXTAL and XTAL pins.
3.2.1
The internal oscillator is also designed to interface with a parallel-resonant crystal resonator in the
frequency range specified for the external crystal in
is shown in
crystal parameters determine the component values required to provide maximum stability and reliable
Freescale Semiconductor
Preliminary
CLKMODE
Crystal Oscillator
Figure
EXTAL
XTAL
3-2. Follow the crystal supplier’s recommendations when selecting a crystal, since
Crystal
OSC
÷ (
Prescaler
PLLCID
1,2,4,8
Figure 3-1 OCCS Block Diagram
)
56F8367 Technical Data, Rev. 8
x (1 to 128)
Detector
PLLDB
Lock
PLL
Reference
Detector
Loss of
Clock
F
Table
OUT
Prescaler CLK
Bus Interface & Control
÷
2
10-13. A recommended crystal oscillator circuit
F
OUT/2
PLLCOD
Loss of Reference
÷ (
Postscaler
Clock Interrupt
1,2,4,8
)
LCK
Postscaler CLK
ZSRC
SYS_CLK2
Source to SIM
Figure 3-1
Interface
Bus
shows the
Introduction
39
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