MC56F8367EVME Freescale Semiconductor, MC56F8367EVME Datasheet - Page 124

EVAL BOARD FOR MC56F83X

MC56F8367EVME

Manufacturer Part Number
MC56F8367EVME
Description
EVAL BOARD FOR MC56F83X
Manufacturer
Freescale Semiconductor
Type
DSPr
Datasheets

Specifications of MC56F8367EVME

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC56F8145-67 and MC56F8345-67
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
56800/E
Core Sub-architecture
56800/E
Silicon Core Number
MC56F
Silicon Family Name
MC56F83xx
Rohs Compliant
Yes
For Use With/related Products
MC56F83x5, MC56F83x6, MC56F83x7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.5.9.1
Each bit controls clocks to the indicated peripheral.
6.5.9.2
Each bit controls clocks to the indicated peripheral.
6.5.9.3
Each bit controls clocks to the indicated peripheral.
6.5.9.4
Each bit controls clocks to the indicated peripheral.
6.5.9.5
Each bit controls clocks to the indicated peripheral.
6.5.9.6
Each bit controls clocks to the indicated peripheral.
6.5.9.7
Each bit controls clocks to the indicated peripheral.
6.5.9.8
Each bit controls clocks to the indicated peripheral.
124
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
External Memory Interface Enable (EMI)—Bit 15
Analog-to-Digital Converter B Enable (ADCB)—Bit 14
Analog-to-Digital Converter A Enable (ADCA)—Bit 13
FlexCAN Enable (CAN)—Bit 12
Decoder 1 Enable (DEC1)—Bit 11
Decoder 0 Enable (DEC0)—Bit 10
Quad Timer D Enable (TMRD)—Bit 9
Quad Timer C Enable (TMRC)—Bit 8
56F8367 Technical Data, Rev. 8
Freescale Semiconductor
Preliminary

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