MC56F8367EVME Freescale Semiconductor, MC56F8367EVME Datasheet - Page 3

• Manufacturer Part Number: MC56F8367EVME
• Description: EVAL BOARD FOR MC56F83X
• Manufacturer: Freescale Semiconductor
• Type: DSPr

Specifications of MC56F8367EVME

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MC56F8145-67 and MC56F8345-67
• Data Bus Width: 16 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: 56800/E
• Core Sub-architecture: 56800/E
• Silicon Core Number: MC56F
• Silicon Family Name: MC56F83xx
• Rohs Compliant: Yes
• For Use With/related Products: MC56F83x5, MC56F83x6, MC56F83x7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

56F8367/56F8167 General Description
Note: Features in italics are NOT available in the 56F8167 device.
Freescale Semiconductor
Preliminary
• Up to 60 MIPS at 60MHz core frequency
• DSP and MCU functionality in a unified,
• Access up to 4MB of off-chip program and 32MB of
• Chip Select Logic for glueless interface to ROM and
• 512KB of Program Flash
• 4KB of Program RAM
• 32KB of Data Flash
• 32KB of Data RAM
• 32KB Boot Flash
• Up to two 6-channel PWM modules
• Four 4-channel, 12-bit ADCs
C-efficient architecture
data memory
SRAM
4
3
4
4
4
5
4
4
3
4
4
4
2
2
6
6
VREF
PWM Outputs
Current Sense Inputs
or GPIOC
Fault Inputs
PWM Outputs
Current Sense Inputs
or GPIOD
Fault Inputs
AD0
AD1
AD0
AD1
Temp_Sense
Decoder 0 or
Decoder 1 or
Quadrature
Quadrature
Timer C or
Timer D or
Timer A or
Timer B or
FlexCAN
GPIOC
SPI1 or
GPIOC
GPIOE
GPIOE
Quad
Quad
Quad
Quad
ADCA
ADCB
Decoding
Peripherals
Program Memory
256K x 16 Flash
16K x 16 Flash
16K x 16 Flash
16K x 16 Flash
D
2K x 16 RAM
SPI0 or
GPIOE
Boot ROM
ata Memory
4
PWMA
PWMB
Memory
SCI1 or
GPIOD
2
RSTO
Hardware Looping Unit
Device Selects
Program Controller
XDB2
XAB1
XAB2
PAB
PDB
CDBR
CDBW
56F8367/56F8167 Block Diagram
Peripheral
RESET
SCI0 or
GPIOE
EMI_MODE
and
2
56F8367 Technical Data, Rev. 8
EXTBOOT
PAB
PDB
CDBR
CDBW
Watchdog
IPBus Bridge (IPBB)
COP/
RW
Control
EOnCE
Generation Unit
JTAG/
Port
Address
5
IRQA IRQB
Controller
IPAB
Interrupt
V
2
PP
56800E Core
IPWDB
V
16-Bit
4
Three 16-bit Input Registers
CAP
16 x 16 + 36 -> 36-Bit MAC
Four 36-bit Accumulators
System Bus
• Temperature Sensor
• Up to two Quadrature Decoders
• Optional on-chip regulator
• Up to two FlexCAN modules
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interfaces (SPIs)
• Up to four general-purpose Quad Timers
• Computer Operating Properly (COP) / Watchdog
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
• Up to 76 GPIO lines
• 160-pin LQFP Package and 160 MAPBGA
7
Integration
V
Control
System
Digital Reg
Data ALU
OCR_DIS
Module
DD
IPRDB
unobtrusive, real-time debugging
CLKO
resets
R/W Control
Clock
6
Low Voltage
V
Supervisor
SS
O
R
P
V
2
DDA
Analog Reg
GPIO or EMI CS or
CLKMODE
Generator
Clock
Manipulation
FlexCAN2
External Data
PLL
Address Bus
Bus Control
Bus Switch
V
Unit
Bit
External
SSA
Switch
O
S
C
XTAL
EXTAL
6
2
8
7
9
4
4
3
shown for on-chip
* Configuration
GPIOD1 (CS3 or CAN2_RX)
GPIOD2-5 or CS4 -7
GPIOD0 (CS2 or CAN2_TX)
2.5V regulator
A0-5 or GPIOA8-13
A6-7 or GPIOE2-3
A8-15 or GPIOA0-7
GPIOB0-3 (A16-19)
GPIOB4 (A20, prescaler_clock)
GPIOB5-7 (A21-23, clk0-3**)
D0-6 or GPIOF9-15
D7-15 or GPIOF0-8
WR
RD
PS / CS0 (GPIOD8)
DS / CS1 (GPIOD9)
**See Table 2-2
for explanation
3