MC56F8367EVME Freescale Semiconductor, MC56F8367EVME Datasheet - Page 26
MC56F8367EVME
Manufacturer Part Number
MC56F8367EVME
Description
EVAL BOARD FOR MC56F83X
Manufacturer
Freescale Semiconductor
Type
DSPr
Specifications of MC56F8367EVME
Contents
Module and Misc Hardware
Processor To Be Evaluated
MC56F8145-67 and MC56F8345-67
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
56800/E
Core Sub-architecture
56800/E
Silicon Core Number
MC56F
Silicon Family Name
MC56F83xx
Rohs Compliant
Yes
For Use With/related Products
MC56F83x5, MC56F83x6, MC56F83x7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA (Continued)
(CAN2_RX)
(CAN2_TX)
GPIOD0
GPIOD1
Signal
Name
(CS2)
(CS3)
No.
Pin
55
56
Ball No.
P6
L6
Schmitt
Schmitt
Output
Output
Output
Output
Output
Input/
Open
Input/
Type
Drain
Input
56F8367 Technical Data, Rev. 8
enabled
enabled
During
pull-up
pull-up
Reset
State
Input,
Input,
Port D GPIO — This GPIO pin can be individually programmed
as an input or output pin.
Chip Select — CS2 may be programmed within the EMI module
to act as a chip select for specific areas of the external memory
map.
Depending upon the state of the DRV bit in the EMI Bus Control
Register (BCR), CS2 is tri-stated when the external bus is
inactive.
Most designs will want to change the DRV state to DRV = 1
instead of using the default setting.
FlexCAN2 Transmit Data — CAN output.
At reset, this pin is configured as GPIO. This configuration can be
changed by setting bit 0 in the GPIO_D_PER register. Then
change bit 4 in the SIM_GPS register to select the desired
peripheral function.
To deactivate the internal pull-up resistor, clear bit 0 in the
GPIOD_PUR register.
Port D GPIO — This GPIO pin can be individually programmed
as an input or output pin.
Chip Select — CS3 may be programmed within the EMI module
to act as a chip select for specific areas of the external memory
map.
Depending upon the state of the DRV bit in the EMI Bus Control
Register (BCR), CS3 is tri-stated when the external bus is
inactive.
Most designs will want to change the DRV state to DRV = 1 instead
of using the default setting.
FlexCAN2 Receive Data — This is the CAN input. This pin has
an internal pull-up resistor.
At reset, this pin is configured as GPIO. This configuration can be
changed by setting bit 1 in the GPIO_D_PER register. Then
change bit 5 in the SIM_GPS register to select the desired
peripheral function.
To deactivate the internal pull-up resistor, clear bit 1 in the
GPIOD_PUR register.
Signal Description
Freescale Semiconductor
Preliminary
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