MC56F8367EVME Freescale Semiconductor, MC56F8367EVME Datasheet - Page 126
![EVAL BOARD FOR MC56F83X](/photos/9/23/92375/mc56f8367evme_sml.jpg)
MC56F8367EVME
Manufacturer Part Number
MC56F8367EVME
Description
EVAL BOARD FOR MC56F83X
Manufacturer
Freescale Semiconductor
Type
DSPr
Specifications of MC56F8367EVME
Contents
Module and Misc Hardware
Processor To Be Evaluated
MC56F8145-67 and MC56F8345-67
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
56800/E
Core Sub-architecture
56800/E
Silicon Core Number
MC56F
Silicon Family Name
MC56F83xx
Rohs Compliant
Yes
For Use With/related Products
MC56F83x5, MC56F83x6, MC56F83x7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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6.5.10
The I/O Short Address Location registers are used to specify the memory referenced via the I/O short
address mode. The I/O short address mode allows the instruction to specify the lower six bits of address;
the upper address bits are not directly controllable. This register set allows limited control of the full
address, as shown in
Note:
With this register set, an interrupt driver can set the SIM_ISALL register pair to point to its peripheral
registers and then use the I/O Short addressing mode to reference them. The ISR should restore this register
to its previous contents prior to returning from interrupt.
Note:
Note:
6.5.10.1
This field represents the upper two address bits of the “hard coded” I/O short address.
126
Base + $D
RESET
Write
Read
I/O Short Address Location Register (SIM_ISALH and SIM_ISALL)
If this register is set to something other than the top of memory (EOnCE register space) and the EX bit
in the OMR is set to 1, the JTAG port cannot access the on-chip EOnCE registers, and debug functions
will be affected.
The default value of this register set points to the EOnCE registers.
The pipeline delay between setting this register set and using short I/O addressing with the new value
is three cycles.
Input/Output Short Address Low (ISAL[23:22])—Bit 1–0
Figure 6-15 I/O Short Address Location High Register (SIM_ISALH)
Full 24-Bit for Short I/O Address
2 bits from SIM_ISALH Register
15
1
1
Figure
16 Bits from SIM_ISALL Register
14
1
1
Figure 6-14 I/O Short Address Determination
13
6-14.
1
1
6 Bits from I/O Short Address Mode Instruction
12
1
1
11
56F8367 Technical Data, Rev. 8
1
1
10
1
1
“
Hard Coded” Address Portion
9
1
1
8
1
1
7
1
1
6
1
1
5
1
1
Instruction Portion
4
1
1
3
1
1
Freescale Semiconductor
2
1
1
ISAL[23:22]
1
1
Preliminary
0
1
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