MCP1631RD-DCPC1 Microchip Technology, MCP1631RD-DCPC1 Datasheet - Page 91
![REF DES BATT CHARG OR LED DRIVER](/photos/28/39/283975/mcp1631rd-dcpc1_sml.jpg)
MCP1631RD-DCPC1
Manufacturer Part Number
MCP1631RD-DCPC1
Description
REF DES BATT CHARG OR LED DRIVER
Manufacturer
Microchip Technology
Datasheets
1.PIC16F616T-ISL.pdf
(214 pages)
2.MCP1631VHVT-330EST.pdf
(34 pages)
3.MCP1631VHVT-330EST.pdf
(32 pages)
Specifications of MCP1631RD-DCPC1
Current - Output / Channel
700mA
Outputs And Type
1, Non-Isolated
Features
Firmware for Li-Ion, NiMH, and NiCd Battery Charger
Voltage - Input
3.5 ~ 16 V
Utilized Ic / Part
MCP1631HV, PIC16F616
Core Chip
MCP1631HV, PIC16F616
Topology
Parallel, Series
Output Current
1A
No. Of Outputs
1
Input Voltage
3.5V To 16V
Dimming Control Type
Analog
Kit Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- MCP1631VHVT-330EST PDF datasheet #2
- MCP1631VHVT-330EST PDF datasheet #3
- Current page: 91 of 214
- Download datasheet (4Mb)
10.3.1
The PWM period is specified by writing to the PR2
register of Timer2. The PWM period can be calculated
using the formula of Equation 10-1.
EQUATION 10-1:
When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
• TMR2 is cleared
• The CCP1 pin is set. (Exception: If the PWM duty
• The PWM duty cycle is latched from CCPR1L into
10.3.2
The PWM duty cycle is specified by writing a 10-bit
value to multiple registers: CCPR1L register and
CCP1<1:0> bits of the CCP1CON register. The
CCPR1L contains the eight MSbs and the CCP1<1:0>
bits of the CCP1CON register contain the two LSbs.
CCPR1L and CCP1<1:0> bits of the CCP1CON
register can be written to at any time. The duty cycle
value is not latched into CCPR1H until after the period
completes (i.e., a match between PR2 and TMR2
registers occurs). While using the PWM, the CCPR1H
register is read-only.
Equation 10-2 is used to calculate the PWM pulse
width.
Equation 10-3 is used to calculate the PWM duty cycle
ratio.
TABLE 10-4:
TABLE 10-5:
© 2009 Microchip Technology Inc.
Timer Prescale (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
Timer Prescale (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
cycle = 0%, the pin will not be set.)
CCPR1H.
Note:
PWM Period
PWM Frequency
PWM Frequency
PWM PERIOD
The Timer2 postscaler (see Section 7.1
“Timer2 Operation”) is not used in the
determination of the PWM frequency.
PWM DUTY CYCLE
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS (F
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS (F
=
(TMR2 Prescale Value)
[
PWM PERIOD
(
PR2
)
+
1
] 4 T
1.22 kHz
1.22 kHz
•
0xFF
0x65
16
10
16
•
8
OSC
PIC16F610/616/16HV610/616
•
4.88 kHz
4.90 kHz
0xFF
0x65
10
4
4
8
19.53 kHz
19.61 kHz
EQUATION 10-2:
EQUATION 10-3:
The CCPR1H register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
The 8-bit timer TMR2 register is concatenated with
either the 2-bit internal system clock (F
the prescaler, to create the 10-bit time base. The system
clock is used if the Timer2 prescaler is set to 1:1.
When the 10-bit time base matches the CCPR1H and
2-bit latch, then the CCP1 pin is cleared (see
Figure 10-3).
10.3.3
The resolution determines the number of available duty
cycles for a given period. For example, a 10-bit resolution
will result in 1024 discrete duty cycles, whereas an 8-bit
resolution will result in 256 discrete duty cycles.
The maximum PWM resolution is 10 bits when PR2 is
255. The resolution is a function of the PR2 register
value as shown by Equation 10-4.
EQUATION 10-4:
Note:
0xFF
0x65
Duty Cycle Ratio
10
1
1
8
Pulse Width
Resolution
If the pulse width value is greater than the
period the assigned PWM pin(s) will
remain unchanged.
PWM RESOLUTION
78.12 kHz
76.92 kHz
=
0x3F
0x19
1
8
1
6
(
T
=
CCPR1L:CCP1CON<5:4>
OSC
OSC
=
OSC
PULSE WIDTH
DUTY CYCLE RATIO
PWM RESOLUTION
(
---------------------------------------------------------------------- -
CCPR1L:CCP1CON<5:4>
log
----------------------------------------- - bits
= 20 MHz)
= 8 MHz)
•
[
4 PR2
153.85 kHz
log
156.3 kHz
(
(TMR2 Prescale Value)
4 PR2
0x0C
0x1F
2 ( )
(
1
7
1
5
+
DS41288F-page 91
1
+
)
OSC
]
1
)
), or 2 bits of
208.3 kHz
200.0 kHz
0x17
0x09
)
6.6
1
1
5
•
)
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