MCP1631RD-DCPC1 Microchip Technology, MCP1631RD-DCPC1 Datasheet - Page 21

• Manufacturer Part Number: MCP1631RD-DCPC1
• Description: REF DES BATT CHARG OR LED DRIVER
• Manufacturer: Microchip Technology

Specifications of MCP1631RD-DCPC1

• Current - Output / Channel: 700mA
• Outputs And Type: 1, Non-Isolated
• Features: Firmware for Li-Ion, NiMH, and NiCd Battery Charger
• Voltage - Input: 3.5 ~ 16 V
• Utilized Ic / Part: MCP1631HV, PIC16F616
• Core Chip: MCP1631HV, PIC16F616
• Topology: Parallel, Series
• Output Current: 1A
• No. Of Outputs: 1
• Input Voltage: 3.5V To 16V
• Dimming Control Type: Analog
• Kit Contents: Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.2.2.4
The PIE1 register contains the peripheral interrupt
enable bits, as shown in Register 2-4.
REGISTER 2-4:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
—
PIC16F616/16HV616 only. PIC16F610/16HV610 unimplemented, read as ‘0’.
PIE1 Register
Unimplemented: Read as ‘0’
ADIE: A/D Converter (ADC) Interrupt Enable bit
1 = Enables the ADC interrupt
0 = Disables the ADC interrupt
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
C2IE: Comparator C2 Interrupt Enable bit
1 = Enables the Comparator C2 interrupt
0 = Disables the Comparator C2 interrupt
C1IE: Comparator C1 Interrupt Enable bit
1 = Enables the Comparator C1 interrupt
0 = Disables the Comparator C1 interrupt
Unimplemented: Read as ‘0’
TMR2IE: Timer2 to PR2 Match Interrupt Enable bit
1 = Enables the Timer2 to PR2 match interrupt
0 = Disables the Timer2 to PR2 match interrupt
TMR1IE: Timer1 Overflow Interrupt Enable bit
1 = Enables the Timer1 overflow interrupt
0 = Disables the Timer1 overflow interrupt
ADIE
R/W-0
PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1
(1)
W = Writable bit
‘1’ = Bit is set
CCP1IE
R/W-0
(1)
PIC16F610/616/16HV610/616
R/W-0
C2IE
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
C1IE
(1)
Note:
(1)
Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt.
U-0
—
x = Bit is unknown
TMR2IE
R/W-0
(1)
DS41288F-page 21
TMR1IE
R/W-0
bit 0