MCP1631RD-DCPC1 Microchip Technology, MCP1631RD-DCPC1 Datasheet - Page 18

REF DES BATT CHARG OR LED DRIVER

MCP1631RD-DCPC1

Manufacturer Part Number
MCP1631RD-DCPC1
Description
REF DES BATT CHARG OR LED DRIVER
Manufacturer
Microchip Technology

Specifications of MCP1631RD-DCPC1

Current - Output / Channel
700mA
Outputs And Type
1, Non-Isolated
Features
Firmware for Li-Ion, NiMH, and NiCd Battery Charger
Voltage - Input
3.5 ~ 16 V
Utilized Ic / Part
MCP1631HV, PIC16F616
Core Chip
MCP1631HV, PIC16F616
Topology
Parallel, Series
Output Current
1A
No. Of Outputs
1
Input Voltage
3.5V To 16V
Dimming Control Type
Analog
Kit Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC16F610/616/16HV610/616
2.2.2.1
The STATUS register, shown in Register 2-1, contains:
• the arithmetic status of the ALU
• the Reset status
• the bank select bits for data memory (RAM)
The STATUS register can be the destination for any
instruction, like any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
For example, CLRF STATUS, will clear the upper three
bits and set the Z bit. This leaves the STATUS register
as ‘000u u1uu’ (where u = unchanged).
REGISTER 2-1:
DS41288F-page 18
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
Reserved
IRP
For Borrow, the polarity is reversed. A subtraction is executed by adding the two’s complement of the second operand.
For rotate (RRF, RLF) instructions, this bit is loaded with either the high-order or low-order bit of the source register.
STATUS Register
IRP: This bit is reserved and should be maintained as ‘0’
RP1: This bit is reserved and should be maintained as ‘0’
RP0: Register Bank Select bit (used for direct addressing)
1 = Bank 1 (80h – FFh)
0 = Bank 0 (00h – 7Fh)
TO: Time-out bit
1 = After power-up, CLRWDT instruction or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit Carry/Borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions), For Borrow, the polarity is reversed.
1 = A carry-out from the 4th low-order bit of the result occurred
0 = No carry-out from the 4th low-order bit of the result
C: Carry/Borrow bit
1 = A carry-out from the Most Significant bit of the result occurred
0 = No carry-out from the Most Significant bit of the result occurred
Reserved
RP1
STATUS: STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
(1)
R/W-0
RP0
(ADDWF, ADDLW, SUBLW, SUBWF instructions)
R-1
TO
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
It is recommended, therefore, that only BCF, BSF,
SWAPF and MOVWF instructions are used to alter the
STATUS register, because these instructions do not
affect any Status bits. For other instructions not affect-
ing any Status bits, see the Section 13.0 “Instruction
Set Summary”.
R-1
PD
Note 1: Bits IRP and RP1 of the STATUS register
2: The C and DC bits operate as a Borrow
are
PIC16F610/616/16HV610/616
should be maintained as clear. Use of
these bits is not recommended, since this
may affect upward compatibility with
future products.
and Digit Borrow out bit, respectively, in
subtraction. See the SUBLW and SUBWF
instructions for examples.
R/W-x
Z
not
© 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-x
used
DC
by
R/W-x
C
and
bit 0
the

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