HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 484

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HD6435348R

Manufacturer Part Number
HD6435348R
Description
Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
5. Mode 7
Figure E-5 shows how the pin states change when the RES pin goes Low in mode 7.
As soon as RES goes Low, all ports are initialized to the input (high-impedance) state.
The clock output pins P1
RES pin is sampled. Both pins are initialized to the output state.
*
P1 / ø*
P1 / E*
RES
Internal reset signal
I/O ports
The dotted line indicates that P1 /ø and P1 /E are input ports if the corresponding DDR
bit is 0, but clock output pins if the DDR bit is 1.
0
0
Figure E-5 Reset during Memory Access (Mode 7)
0
/ø and P1
1
/E are initialized 0.5 ø clock periods after the Low state of the
0
0
474
High impedance

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