HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 39

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HD6435348R

Manufacturer Part Number
HD6435348R
Description
Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
Table 1-4 Pin Functions (cont)
Type
System
control
Address A
bus
Data bus D
Bus
control
Symbol
BREQ
STBY
RES
A
WAIT
AS
R/W
DS
RD
WR
19
7
7
– A
– D
– A
0
0
8
CP-84, FP-80A,
CG-84 TFP-80C
6
20
21
54 – 43 41 – 30
40 – 33 28 – 21
32 – 25 20 – 13
7
11
12
13
14
15
Pin No.
75
9
10
76
80
1
2
3
4
I/O
I
I
I/O
O
I/O
I
O
O
O
O
O
Name and Function
Bus Request: Sent by an external device to the
H8/534 or H4/536 to request the bus right.
Standby: A transition to the hardware standby
mode (a power-down state) occurs when a Low
input is received at the STBY pin.
Reset: Low input or low output due to watchdog timer
overflow causes the H8/534 or H8/536 chip to reset.
Address Bus: Address output pins.
Data Bus: 8-Bit bidirectional data bus.
Wait: Requests the CPU to insert one or more Tw
states when accessing an off-chip address.
Address Strobe: Goes Low to indicate that there
is a valid address on the address bus.
Read/Write: Indicates whether the CPU is reading
or writing data on the bus.
• High—Read
• Low—Write
Data Strobe: Goes Low to indicate the presence
of valid data on the data bus.
Read: Goes Low to indicate that the CPU is
reading an external address.
Write: Goes Low to indicate that the CPU is
writing to an external address.
18

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