HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 253

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HD6435348R

Manufacturer Part Number
HD6435348R
Description
Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
Table 12-3 PWM Timer Parameters for 10 MHz System Clock
Internal Clock Frequency
ø/2
ø/8
ø/32
ø/128
ø/256
ø/1024
ø/2048
ø/4096
12.3 Operation
Figure 12-2 shows the timing of the PWM timer operation.
1. Positive Logic (OS = 0)
(1) When OE = 0—(a) in Figure 12-2: The timer count is held at H'00 and PWM output is
(2) When OE = 1
2. Negative Logic (OS = 1): The operation is the same except that High and Low are reversed in
the PWM output. [(e) in figure 12-2]
inhibited. (The pin is used for port 9 input/output, and its state depends on the corresponding
port 9 data register and data direction register.) Any value (such as N in figure 12-2) written
in the DTR becomes valid immediately.
i) The timer counter begins incrementing, and the PWM output goes High. [(b) in figure 12-2]
ii) When the count reaches the DTR value, the PWM output goes Low. [(c) in figure 12-2]
iii)If the DTR value is changed (by writing the data M in figure 12-2), the new value
becomes valid after the timer count changes from H'F9 to H'00. [(d) in figure 12-2]
Resolution
200 ns
800 ns
3.2 µs
12.8 µs
25.6 µs
102.4 µs
204.8 µs
409.6 µs
PWM Period
50 µs
200 µs
800 µs
3.2 ms
6.4 ms
25.6 ms
51.2 ms
102.4 ms
238
PWM Frequency
20 kHz
5 kHz
1.25 kHz
312.5 Hz
156.3 Hz
39.1 Hz
19.5 Hz
9.8 Hz

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