HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 269

• Manufacturer Part Number: HD6435348R
• Description: Single-Chip Microcomputer
• Manufacturer: Hitachi Semiconductor

14.1 Overview
The H8/534 and H8/536 have two serial communication interface channels (SCI1 and SCI2) for
transferring serial data to and from other chips. Each channel supports both synchronous and
asynchronous data transfer. Communication control functions are provided by eight internal
registers.
14.1.1 Features
The features of the on-chip serial communication interface are:
• Selection of asynchronous or synchronous mode
• Full duplex communication
• Built-in baud rate generator
• Internal or external clock source
• Three interrupts
— Asynchronous mode
— Synchronous mode
The transmitting and receiving sections are independent, so each channel can transmit and
receive simultaneously. Both the transmit and receive sections use double buffering, so
continuous data transfer is possible in either direction.
Any specified bit rate can be generated.
The baud rate generator can operate on an internal clock source, or an external clock signal
input at the SCK pin.
Transmit-end, receive-end, and receive-error interrupts are requested independently. The
transmit-end and receive-end interrupts can be served by the on-chip data transfer controller
(DTC), providing a convenient way to transfer data with minimal CPU programming.
SCI1 and SCI2 can communicate with a UART (Universal Asynchronous
Receiver/Transmitter), ACIA (Asynchronous Communication Interface Adapter), or other
chip that employs standard asynchronous serial communication. Eight data formats are
available.
— Data length: 7 or 8 bits
— Stop bit length: 1 or 2 bits
— Parity: Even, odd, or none
— Error detection: Parity, overrun, and framing errors
SCI1 and SCI2 can communicate with chips able to synchronize data transfers with clock
pulses.
— Data length: 8 bits
— Error detection: Overrun errors
Section 14 Serial Communication Interface
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