HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 82
HD6435348R
Manufacturer Part Number
HD6435348R
Description
Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
1.HD6435348R.pdf
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3.5.9 Short-Format Instructions
The ADD, CMP, and MOV instructions have special short formats. Table 3-17 lists these short
formats together with the equivalent general formats.
The short formats are a byte shorter than the corresponding general formats, and most of them
execute one state faster.
Table 3-17 Short-Format Instructions and Equivalent General Formats
Short-Format
Instruction
ADD:Q #xx,Rd
CMP:E #xx:8,Rd
CMP:I #xx:16,Rd
MOV:E #xx:8,Rd
MOV:I #xx:16,Rd
MOV:L @aa:8,Rd
MOV:S Rs,@aa:8
MOV:F @(d:8,R6),Rd
MOV:F Rs,@(d:8,R6)
Notes: * 1 The ADD:Q instruction accepts other destination operands in addition to a general
3.6 Operating Modes
The CPU operates in one of two modes: the minimum mode or the maximum mode.
These modes are selected by the mode pins (MD
3.6.1 Minimum Mode
The minimum mode supports a maximum address space of 64 kbytes. The page registers are
ignored. Instructions that branch across page boundaries (PJMP, PJSR, PRTS, PRTD) are invalid.
* 2 Number of execution states for access to on-chip memory.
register, but the immediate data value (#xx) is limited to ±1 or ±2.
*1
Length
2
2
3
2
3
2
2
2
2
2
2
3
2
3
5
5
5
5
Execution Equivalent General-
States
*2
Format Instruction
ADD:G
CMP:G.B #xx:8,Rd
CMP:G.W #xx:16,Rd
MOV:G.B #xx:8,Rd
MOV:G.W #xx:16,Rd
MOV:G
MOV:G
MOV:G
MOV:G
62
2
to MD
0
#xx:8,Rd
@aa:8,Rd
Rs,@aa:8
@(d:8,R6),Rd
Rs,@(d:8,R6)
).
Length
3
3
4
3
4
3
3
3
3
Execution
States *2
3
3
4
3
4
5
5
5
5
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