HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 338
HD6435348R
Manufacturer Part Number
HD6435348R
Description
Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
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Notes: 1. The RAME bit in the RAM control register should be cleared to 0 before the STBY
18.4.2 Recovery from Hardware Standby Mode
Recovery from the hardware standby mode requires inputs at both the STBY and RES pins.
When the STBY pin goes High, the clock oscillator begins running. The RES pin should be Low
at this time and should be held Low long enough for the clock to stabilize. When the RES pin
changes from Low to High, the reset sequence is executed and the chip returns to the program
execution state.
Note: During standby mode, power must still be supplied to AV
18.4.3 Timing Sequence of Hardware Standby Mode
Figure 18-2 shows the usual sequence for entering and leaving the hardware standby mode.
First the RES pin goes Low, placing the chip in the reset state. Then the STBY pin goes Low,
placing the chip in the hardware standby mode and stopping the clock. In the recovery sequence
first the STBY pin goes High; then after the clock stabilizes, the RES pin is returned to the High
level.
held at the selected mode.
2. Do not change the inputs at the mode pins (MD2, MD1, MD0) during hardware
pin goes Low, to disable the on-chip RAM during the hardware standby mode.
standby mode. Be particularly careful not to let all three mode inputs go low, since
that would place the chip in PROM mode, causing increased current dissipation.
Oscillator
RES
STBY
Figure 18-2 Hardware Standby Sequence
326
Clock settling time
CC
, and the mode pins must be
Restart
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