HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 311
HD6435348R
Manufacturer Part Number
HD6435348R
Description
Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
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Table 15-4 A/D Conversion Time (Single Mode)
Item
Synchronization delay
Input sampling time
Total A/D conversion time
Note: Values in the table are numbers of states.
15.4.4 External Triggering of A/D Conversion
A/D conversion can be started by an external trigger input.
External trigger input is enabled at the ADTRG pin when the TRGE bit in the ADCR is set to 1.
Between 1.5 and 2 ø clock cycles after the ADTRG input goes Low, the ADST bit in the ADCSR
is set to 1 and A/D conversion commences.
The timing of external triggering is shown in figure 15-6.
ø
ADTRG
ADST
Figure 15-6 Timing of Setting of ADST Bit
Symbol
t
t
t
D
SPL
CONV
1.0 to 2.0 cycles
Min
18
—
259
CKS = 0
297
Typ
—
63
—
Max
33
—
274
Min
10
—
131
A/D conversion
CKS = 1
Typ
—
31
—
17
Max
—
138
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