HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 303
HD6435348R
Manufacturer Part Number
HD6435348R
Description
Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
1.HD6435348R.pdf
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Group Select
CH2
0
1
15.2.3 A/D Control Register (ADCR)—H'FEE9
Bit
Initial value
Read/Write
The A/D control register (ADCR) is an 8-bit readable/writable register that enables or disables the
A/D external trigger signal.
The ADCR is initialized to H'7F at a reset and in the standby modes.
Bit 7—Trigger Enable (TRGE): This bit enables or disables the ADTRG (A/D external trigger)
signal.
Bit 7
TRGE
0
1
Bit 6 to 0—Reserved: These bits cannot be modified and are always read as 1.
Description
External triggering of A/D conversion is disabled.
A High-to-Low transition of ADTRG starts A/D conversion.
TRGE
R/W
CH1
0
0
1
1
0
0
1
1
7
0
Channel Select
—
—
6
1
CH0
0
1
0
1
0
1
0
1
—
—
5
1
289
—
—
4
1
—
—
Single Mode
AN
AN
AN
AN
AN
AN
AN
AN
3
1
0
1
2
3
4
5
6
7
Selected Channels
—
—
2
1
(Initial value)
Scan Mode
AN
AN
AN
AN
AN
AN
AN
AN
0
0
0
0
4
4
4
4
—
—
1
1
and AN
to AN
to AN
and AN
to AN
to AN
2
3
6
7
1
5
—
—
0
1
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