HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 279

• Manufacturer Part Number: HD6435348R
• Description: Single-Chip Microcomputer
• Manufacturer: Hitachi Semiconductor

Bit
Initial value
Read/Write
14.2.8 Bit Rate Register (BRR)—H'FED9, H'FEF1
The BRR is an 8-bit register that, together with the CKS1 and CKS0 bits in the SMR, determines
the bit rate output by the baud rate generator.
The BRR is initialized to H'FF (the slowest rate) at a reset and in the standby modes.
Tables 14-3 and 14-4 show examples of BRR (N) and CKS (n) settings for commonly used bit
rates.
Table 14-3 Examples of BRR Settings in Asynchronous Mode (1)
Bit
Rate
110
150
300
600
1200
2400
4800
9600
19200
31250
38400
n
1
0
0
0
0
0
—
—
—
—
—
N
70
207
103
51
25
12
—
—
—
—
—
R/W
2
7
1
Error
(%)
+0.03
+0.16
+0.16
+0.16
+0.16
+0.16
—
—
—
—
—
R/W
6
1
n
1
0
0
0
0
0
0
0
0
—
0
XTAL Frequency (MHz)
N
86
255
127
63
31
15
7
3
1
—
0
R/W
2.4576
5
1
Error
(%)
+0.31
0
0
0
0
0
0
0
0
—
0
265
R/W
4
1
n
1
1
0
0
0
0
0
—
—
0
—
R/W
3
1
N
141
103
207
103
51
25
12
—
—
1
—
4
Error
(%)
+0.03
+0.16
+0.16
+0.16
+0.16
+0.16
+0.16
—
—
0
—
R/W
2
1
n
1
1
0
0
0
0
0
—
—
—
—
R/W
1
1
4.194304
148
N
108
217
108
54
26
13
—
—
—
—
R/W
Error
(%)
–0.04
+0.21
+0.21
+0.21
–0.70
+1.14
–2.48
—
—
—
—
0
1