HYB18M1G320BF QIMONDA [Qimonda AG], HYB18M1G320BF Datasheet - Page 30

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HYB18M1G320BF

Manufacturer Part Number
HYB18M1G320BF
Description
DRAMs for Mobile Applications 1-Gbit x32 DDR Mobile-RAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HYB18M1G320BF-7.5
Manufacturer:
LT
Quantity:
95
Rev.1.00, 2007-03
02022006-J7N7-GYFP
Parameter
DQ and DM input setup time
DQ and DM input hold time
DQ and DM input pulse width
Write command to 1st DQS latching transition
DQS input high-level width
DQS input low-level width
DQS falling edge to CK setup time
DQS falling edge hold time from CK
Write preamble setup time
Case 1:
tDQSS = min
Case 2:
tDQSS = max
DI n = Data In for column n
Burst Length = 4 in the case shown
3 subsequent elements of Data In are applied in the programmed order following DI n.
Although tDQSS is drawn only for the first DQS rising edge, each rising edge of DQS
must fall within the ± 25% window of the corresponding positive clock edge.
DQ, DM
DQ, DM
DQS
DQS
CK
CK
t
t
WPRES
WPRES
t
DQSS
t
WPRE
t
DS
t
DQSS
t
CK
t
WPRE
DI n
t
fast slew rate
slow slew rate
fast slew rate
slow slew rate
DS
t
DQSH
t
DH
DI n
t
CH
30
t
t
DQSH
t
DQSL
DSH
t
DH
t
CL
Basic WRITE Timing Parameters for DQs
t
t
t
t
t
t
t
t
t
Timing Parameters for WRITE Command
DS
DH
DIPW
DQSS
DQSH
DQSL
DSS
DSH
WPRES
t
Symbol
DQSL
t
DSS
0.75
0.85
0.75
0.85
1.7
0.75
0.4
0.4
0.2
0.2
0
t
WPST
min.
t
DSH
- 7.5
1-Gbit DDR Mobile-RAM
1.25
0.6
0.6
HY[B/E]18M1G320BF
max.
t
WPST
FIGURE 22
= Don't Care
TABLE 12
Unit
ns
ns
ns
t
t
t
t
t
ns
CK
CK
CK
CK
CK
t
DSS
Data Sheet
Note
1)2)3)
1)2)4)
1)2)3)
1)2)4)
5)
6)

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