HYI39S512160AE-7.5 QIMONDA [Qimonda AG], HYI39S512160AE-7.5 Datasheet
HYI39S512160AE-7.5
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HYI39S512160AE-7.5 Summary of contents
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HY[B/I]39S512400A[E/T], HY[B/I]39S512800A[E/T], HY[B/I]39S512160A[E/T] Revision History: 2007-06, Rev. 1.52 Page Subjects (major changes since last revision) All Adapted internet edition 13 Corrected operation command "Power Down / Clock suspend ...” in truth table Previous Revision: 2007-06, Rev. 1.51 13 Corrected operation ...
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Overview This chapter lists all main features of the product family HY[I/B]39S512[40/80/16]0A[E/T] and the ordering information. 1.1 Features • Fully Synchronous to Positive Clock Edge • °C Operating Temperature for HYB... • - °C ...
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... HYI39S512160AT-7.5 HYI39S512400AE-7.5 HYI39S512800AE-7.5 HYI39S512160AE-7.5 1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury, lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers. ...
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Configuration This chapter contains the pin configuration table and the TSOP package drawing. 2.1 Pin Configuration Listed below are the pin configurations sections for the various signals of the SDRAM. Ball No. Name Pin Buffer Type Type Clock Signals ...
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Ball No. Name Pin Buffer Type Type Data Signals x4 Organization 5 DQ0 I/O LVTTL 11 DQ1 I/O LVTTL 44 DQ2 I/O LVTTL 50 DQ3 I/O LVTTL Data Signals x8 Organization 2 DQ0 I/O LVTTL 5 DQ1 I/O LVTTL 8 ...
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Ball No. Name Pin Buffer Type Type V 6, 12, 46, PWR — SSQ 52 V 28, 41, PWR — Not connected x4 Organization — 10, 13, 15, 40, 42, 45, 47, ...
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Rev. 1.52, 2007-06 03292006-6Y91-0T2Z HY[I/B]39S512[40/80/16]0A[E/T] 512-Mbit Synchronous DRAM Ball Configuration P(G)-TSOPII-54 8 Internet Data Sheet FIGURE 1 ...
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Functional Description This chapter lists all defined commands and their usage for this Synchronous DRAM family. Operation Device State 3) Bank Active Idle Bank Precharge Any Precharge All Any 3) Write Active 3) Write with Auto Active precharge 3) ...
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Field Bits Type BL [2: [6:4] w Mode [12:7] w Rev. 1.52, 2007-06 03292006-6Y91-0T2Z Mode Register Definition (BA[1: Description Burst Length Number of sequential bits per DQ related to one read/write command, see ...
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Burst Length Starting Column Address FullPage n Notes 1. For a burst length of two, ...
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Electrical Characteristics 4.1 Operating Conditions Parameter V Input / Output voltage relative Voltage on supply relative Voltage on supply relative to DDQ SS Operating Temperature for HYB... Operating Temperature for ...
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Parameter Supply Voltage I/O Supply Voltage Input high voltage Input low voltage I Output high voltage ( = – 4.0 mA) OUT I Output low voltage ( = 4.0 mA) OUT Input leakage current, any input (0 V < Output ...
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Parameter Operating Current Precharge Standby Current No Operating Current Burst Operating Current Auto Refresh Current Self Refresh Current Symbol Test Condition DD1 RC RC(min CKE ≤ ...
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AC Characteristics Parameter Clock and Clock Enable Clock Frequency Access Time from Clock Clock High Pulse Width Clock Low Pulse Width Transition time Setup and Hold Times Input Setup Time Input Hold Time CKE Setup Time CKE Hold Time ...
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Parameter Write Cycle Last Data Input to Precharge (Write without Auto Precharge) Last Data Input to Activate (Write with Auto Precharge) DQM Write Mask Latency °C for HYB..., °C for ...
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Package Outlines Rev. 1.52, 2007-06 03292006-6Y91-0T2Z HY[I/B]39S512[40/80/16]0A[E/T] 512-Mbit Synchronous DRAM Package Outline PG-TSOPII-54 (top view) 17 Internet Data Sheet FIGURE 3 ...
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List of Figures Figure 1 Ball Configuration P(G)-TSOPII- ...
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List of Tables Table 1 Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Edition 2007-06 Published by Qimonda AG Gustav-Heinemann-Ring 212 D-81739 München, Germany © Qimonda AG 2007. All Rights Reserved. Legal Disclaimer The information given in this Internet Data Sheet shall in no event be regarded as a guarantee of conditions or ...