HYB18M1G320BF QIMONDA [Qimonda AG], HYB18M1G320BF Datasheet - Page 17

• Manufacturer Part Number: HYB18M1G320BF
• Description: DRAMs for Mobile Applications 1-Gbit x32 DDR Mobile-RAM
• Manufacturer: QIMONDA [Qimonda AG]

1) All AC timing characteristics assume an input slew rate of 1.0 V/ns.
2) The only time that the clock frequency is allowed to change is during power-down, self-refresh or clock stop modes.
3) The transition time for address and command inputs is measured between
4) For command / address input slew rate ≥ 1V/ns.
5) A CK/CK differential slew rate of 2.0 V/ns is assumed for this parameter.
6) For command / address input slew rate ≥ 0.5 V/ns and < 1.0 V/ns.
7) This parameter guarantees device timing. It is verified by device characterization but are not subject to production test.
Rev.1.00, 2007-03
02022006-J7N7-GYFP
Parameter
Clock high-level width
Clock low-level width
Clock cycle time
Address and control input setup time
Address and control input hold time
Address and control input pulse width
Input
CK
CK
Valid
CL = 3
CL = 2
fast slew rate
slow slew rate
fast slew rate
slow slew rate
t
CK
17
t
IS
Valid
t
IH
t
Address / Command Inputs Timing Parameters
CH
V
Symbol
t
t
t
t
t
t
IH
CH
CL
CK
IS
IH
IPW
and
t
CL
V
IL
Valid
= Don't Care
.
0.45
0.45
7.5
15
1.3
1.5
1.3
1.5
3.0
min.
- 7.5
Inputs Timing Parameters
0.55
0.55
–
–
–
–
–
–
–
1-Gbit DDR Mobile-RAM
max.
HY[B/E]18M1G320BF
Unit
t
t
ns
ns
ns
ns
CK
CK
FIGURE 5
TABLE 8
Data Sheet
Note
1)
1)
1)2)
1)3)4)5)
1)3)6)
1)3)4)
1)3)6)
1)7)