NAND08GW3C2B NUMONYX [Numonyx B.V], NAND08GW3C2B Datasheet - Page 38

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NAND08GW3C2B

Manufacturer Part Number
NAND08GW3C2B
Description
8 or 16 Gbit, 2112 byte page, 3 V supply, multilevel, multiplane, NAND Flash memory
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet

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9 Software algorithms
9.1
9.2
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Bad block management
Devices with bad blocks have the same quality level and the same AC and DC
characteristics as devices where all the blocks are valid. A bad block does not affect the
performance of valid blocks because it is isolated from the bit line and common source line
by a select transistor.
The devices are supplied with all the locations inside valid blocks erased (FFh). The bad
block information is written prior to shipping. Any block, where the 1st byte in the spare area
of the last page, does not contain FFh, is a bad block.
The bad block information must be read before any erase is attempted as the bad block
Information may be erased. For the system to be able to recognize the bad blocks based on
the original information it is recommended to create a bad block table following the flowchart
shown in
NAND Flash memory failure modes
The NAND08GW3C2B and NAND16GW3C4B devices may contain bad blocks, where the
reliability of blocks that contain one or more invalid bits is not guaranteed. Additional bad
blocks may develop during the lifetime of the device.
To implement a highly reliable system, all the possible failure modes must be considered:
Refer to
Table 16.
Program/erase failure
in this case, the block has to be replaced by copying the data to a valid block. These
additional bad blocks can be identified as attempts to program or erase them and give
errors in the Status Register.
Because the failure of a Page Program operation does not affect the data in other
pages in the same block, the block can be replaced by re-programming the current data
and copying the rest of the replaced block to an available valid block. The Copy Back
Program command can be used to copy the data to a valid block. See
10.: Random data input during sequential data input
Read failure
in this case, ECC correction must be implemented. To efficiently use the memory
space, it is recommended to recover single-bit errors in read by ECC, without replacing
the whole block.
Table 16
Figure 18.
Block Failure
for the procedure to follow if an error occurs during an operation.
Operation
Program
Erase
Read
Block replacement or ECC (with 4 bit/528 byte)
NAND08GW3C2B, NAND16GW3C4B
ECC (with 4 bit/528 byte)
for more details.
Block replacement
Procedure
Section Figure

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