NAND08GW3C2B NUMONYX [Numonyx B.V], NAND08GW3C2B Datasheet - Page 18

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NAND08GW3C2B

Manufacturer Part Number
NAND08GW3C2B
Description
8 or 16 Gbit, 2112 byte page, 3 V supply, multilevel, multiplane, NAND Flash memory
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet

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0
4 Bus operations
4.5
4.6
18/60
For higher frequencies (t
considered. In this mode, data output is valid on the input/output bus for a time of t
the falling edge of Read Enable signal (see
See
Write protect
Write protect bus operations protect the memory against program or erase operations.
When the Write Protect signal is Low the device does not accept program or erase
operations, therefore, the contents of the memory array cannot be altered. The Write Protect
signal is not latched by Write Enable to ensure protection, even during power-up.
Standby
The memory enters standby mode by holding Chip Enable, E, High for at least 10 µs. In
standby mode, the device is deselected, outputs are disabled and power consumption is
reduced.
Table 4.
1. WP must be V
Command input
Bus operation
Address input
Table 23
Write protect
Data output
Data input
Standby
Bus operations
for details on the timings requirements.
IH
when issuing a program or erase command.
V
V
V
V
V
RLRL
E
X
IH
IL
IL
IL
IL
lower than 30 ns), the extended data out (EDO) mode must be
V
AL
V
V
V
X
X
IH
IL
IL
IL
V
CL
V
V
V
X
X
IH
IL
IL
IL
Figure
Falling
V
V
V
R
X
X
24).
IH
IH
IH
NAND08GW3C2B, NAND16GW3C4B
Rising
Rising
Rising
V
W
X
X
IH
V
IL
X
WP
V
V
/V
X
X
(1)
IH
IL
DD
Data output
I/O0 - I/O7
Command
Data input
Address
RLQX
X
X
after

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