NAND08GW3C2B NUMONYX [Numonyx B.V], NAND08GW3C2B Datasheet - Page 36

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NAND08GW3C2B

Manufacturer Part Number
NAND08GW3C2B
Description
8 or 16 Gbit, 2112 byte page, 3 V supply, multilevel, multiplane, NAND Flash memory
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet

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Concurrent operations and ERS
The NAND16GW3C4B is composed of two 8-Gbit dice stacked together. This configuration
allows the device to support concurrent operations. This means that while performing an
operation in one die (erase, read, program, etc.), another operation is possible in the other
die.
The standard Read Status Register (ERS) operation returns the status of the
NAND16GW3C4B device. To provide information on each 8-Gbit die, the NAND16GW3C4B
features an Extended Read Status Register command that allows to check independently
the status of each die.
The following steps are required to perform concurrent operations:
1.
2.
3.
4.
All combinations of operations are possible except executing read on both dice. This is due
to the fact that the input/output bus is common to both dice.
Refer to
sequence, and to
Table 15.
Read 2nd die status
Read 1st die status
Select one of the two dice by setting the most significant address bit A31 to ‘0’ or ‘1’.
Execute one operation on this die.
Launch a concurrent operation on the other die.
Check the status of these operations by performing an extended read Status Register
operation.
Command
Table 15
Extended Read Status Register commands
for the description of the Extended Read Status Register command
Table
0x7FFFFFFF < Address 0xFFFFFFF
9. for the definition of the Status Register bits.
Address 0x7FFFFFFF
Address range
NAND08GW3C2B, NAND16GW3C4B
1 bus write cycle
F1h
F2h

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