HD6413003RVF RENESAS [Renesas Technology Corp], HD6413003RVF Datasheet - Page 7

• Manufacturer Part Number: HD6413003RVF
• Description: microcontroller (MCU)
• Manufacturer: RENESAS [Renesas Technology Corp]

5.2
5.3
5.4
5.5
Section 6
6.1
6.2
6.3
6.4
Register Descriptions...................................................................................................... 76
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
Interrupt Sources............................................................................................................. 87
5.3.1
5.3.2
5.3.3
Interrupt Operation ......................................................................................................... 91
5.4.1
5.4.2
5.4.3
Usage Notes .................................................................................................................... 98
5.5.1
5.5.2
5.5.3
Overview ........................................................................................................................ 101
6.1.1
6.1.2
6.1.3
6.1.4
Register Descriptions...................................................................................................... 104
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
Operation ........................................................................................................................ 109
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
Usage Notes .................................................................................................................... 132
6.4.1
System Control Register (SYSCR)................................................................. 76
Interrupt Priority Registers A and B (IPRA, IPRB) ....................................... 77
IRQ Status Register (ISR) .............................................................................. 84
IRQ Enable Register (IER) ............................................................................. 85
IRQ Sense Control Register (ISCR) ............................................................... 86
External Interrupts .......................................................................................... 87
Internal Interrupts ........................................................................................... 88
Interrupt Vector Table ..................................................................................... 88
Interrupt Handling Process ............................................................................. 91
Interrupt Sequence .......................................................................................... 96
Interrupt Response Time................................................................................. 97
Contention between Interrupt and Interrupt-Disabling Instruction ................ 98
Instructions that Inhibit Interrupts .................................................................. 99
Interrupts during EEPMOV Instruction Execution......................................... 99
Bus Controller
Features........................................................................................................... 101
Block Diagram................................................................................................ 102
Input/Output Pins............................................................................................ 103
Register Configuration.................................................................................... 103
Bus Width Control Register (ABWCR) ......................................................... 104
Access State Control Register (ASTCR) ........................................................ 105
Wait Control Register (WCR)......................................................................... 106
Wait State Control Enable Register (WCER) ................................................. 107
Bus Release Control Register (BRCR)........................................................... 108
Area Division.................................................................................................. 109
Chip Select Signals ......................................................................................... 111
Data Bus.......................................................................................................... 112
Bus Control Signal Timing ............................................................................. 113
Wait Modes ..................................................................................................... 121
Interconnections with Memory (Example)..................................................... 127
Bus Arbiter Operation..................................................................................... 129
Connection to Dynamic RAM and Pseudo-Static RAM ................................ 132
............................................................................................ 101