HD6413003RVF RENESAS [Renesas Technology Corp], HD6413003RVF Datasheet - Page 280

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HD6413003RVF

Manufacturer Part Number
HD6413003RVF
Description
microcontroller (MCU)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Port A Data Direction Register (PADDR): PADDR is an 8-bit write-only register that can select
input or output for each pin in port A.
A pin in port A becomes an output pin if the corresponding PADDR bit is set to 1, and an input
pin if this bit is cleared to 0.
PADDR is a write-only register. Its value cannot be read. All bits return 1 when read.
PADDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting, so if a PADDR bit is set to 1, the corresponding pin maintains its
output state in software standby mode.
Port A Data Register (PADR): PADR is an 8-bit readable/writable register that stores data for
pins PA
When a bit in PADDR is set to 1, if port A is read the value of the corresponding PADR bit is
returned directly. When a bit in PADDR is cleared to 0, if port A is read the corresponding pin
level is read.
PADR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
7
to PA
0
.
PA DDR
R/W
PA
7
W
0
7
0
7
7
PA DDR
PA
R/W
6
W
6
0
0
6
6
PA DDR
R/W
PA
5
W
0
5
0
5
Port A data direction 7 to 0
These bits select input or output for port A pins
5
Port A data 7 to 0
These bits store data for port A pins
PA DDR
262
R/W
PA
4
W
0
4
0
4
4
PA DDR
R/W
PA
3
W
0
3
0
3
3
PA DDR
R/W
PA
2
W
0
2
0
2
2
PA DDR
R/W
PA
1
W
0
1
0
1
1
PA DDR
R/W
PA
0
W
0
0
0
0
0

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