HD6413003RVF RENESAS [Renesas Technology Corp], HD6413003RVF Datasheet - Page 321

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HD6413003RVF

Manufacturer Part Number
HD6413003RVF
Description
microcontroller (MCU)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Bit 2—Master Enable TIOCB
Bit 2
EB4
0
1
Bit 1—Master Enable TIOCA
Bit 1
EA4
0
1
Bit 0—Master Enable TIOCA
Bit 0
EA3
0
1
Description
TIOCB
a generic input/output pin).
If XTGD = 0, EB4 is cleared to 0 when input capture A occurs in channel 1.
TIOCB
Description
TIOCA
operates as a generic input/output pin).
If XTGD = 0, EA4 is cleared to 0 when input capture A occurs in channel 1.
TIOCA
TFCR settings
Description
TIOCA
operates as a generic input/output pin).
If XTGD = 0, EA3 is cleared to 0 when input capture A occurs in channel 1.
TIOCA
TFCR settings
4
4
4
4
3
3
output is disabled regardless of TIOR4 and TFCR settings (TIOCB
is enabled for output according to TIOR4 and TFCR settings
output is disabled regardless of TIOR4, TMDR, and TFCR settings (TIOCA
is enabled for output according to TIOR4, TMDR, and
output is disabled regardless of TIOR3, TMDR, and TFCR settings (TIOCA
is enabled for output according to TIOR3, TMDR, and
4
4
3
(EB4): Enables or disables ITU output at pin TIOCB4.
(EA4): Enables or disables ITU output at pin TIOCA4.
(EA3): Enables or disables ITU output at pin TIOCA3.
303
4
(Initial value)
(Initial value)
(Initial value)
operates as
4
3

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