HD6413003RVF RENESAS [Renesas Technology Corp], HD6413003RVF Datasheet - Page 201

• Manufacturer Part Number: HD6413003RVF
• Description: microcontroller (MCU)
• Manufacturer: RENESAS [Renesas Technology Corp]

8.2.4 Data Transfer Control Registers (DTCR)
A data transfer control register (DTCR) is an 8-bit readable/writable register that controls the
operation of one DMAC channel.
The DTCRs are initialized to H'00 by a reset and in standby mode.
Bit 7—Data Transfer Enable (DTE): Enables or disables data transfer on a channel. When the
DTE bit is set to 1, the channel waits for a transfer to be requested, and executes the transfer when
activated as specified by bits DTS2 to DTS0 . When DTE is 0, the channel is disabled and does
not accept transfer requests. DTE is set to 1 by reading the register when DTE is 0, then writing 1.
Bit 7
DTE
0
1
If DTIE is set to 1, a CPU interrupt is requested when DTE is cleared to 0.
Bit
Initial value
Read/Write
Data transfer enable
Enables or disables
data transfer
Description
Data transfer is disabled. In I/O mode or idle mode, DTE is cleared to 0
when the specified number of transfers have been completed.
Data transfer is enabled
DTE
R/W
7
0
Data transfer size
Selects byte or
word size
Data transfer
increment/decrement
Selects whether to
increment or decrement
the memory address
register
DTSZ
R/W
6
0
DTID
R/W
5
0
Repeat enable
Selects repeat
mode
183
RPE
R/W
4
0
Data transfer interrupt enable
Enables or disables the CPU interrupt
at the end of the transfer
DTIE
R/W
3
0
DTS2
R/W
2
0
Data transfer select
These bits select the data
transfer activation source
DTS1
R/W
1
0
(Initial value)
DTS0
R/W
0
0