HD6413003RVF RENESAS [Renesas Technology Corp], HD6413003RVF Datasheet - Page 151

• Manufacturer Part Number: HD6413003RVF
• Description: microcontroller (MCU)
• Manufacturer: RENESAS [Renesas Technology Corp]

DDR Write Timing: Data written to a data direction register (DDR) to change a CS
CS
cycle. Figure 6-21 shows the timing when the CS
output.
6.4.3
After driving the BREQ pin low, hold it low until BACK goes low. If BREQ returns to the high
level before BACK goes low, the bus arbiter may operate incorrectly.
To terminate the external-bus-released state, hold the BREQ signal high for at least three states.
If BREQ is high for too short an interval, the bus arbiter may operate incorrectly.
n
output to generic input, or vice versa, takes effect starting from the T
BREQ Input Timing
ø
Address
CS
1
High impedance
Figure 6-21 DDR Write Timing
T
1
133
1
P8DDR address
pin is changed from generic input to CS
T
2
T
3
3
state of the DDR write
n
pin from
1