HD6413003RVF RENESAS [Renesas Technology Corp], HD6413003RVF Datasheet - Page 380

no-image

HD6413003RVF

Manufacturer Part Number
HD6413003RVF
Description
microcontroller (MCU)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
10.5 Interrupts
The ITU has two types of interrupts: input capture/compare match interrupts, and overflow
interrupts.
10.5.1 Setting of Status Flags
Timing of Setting of IMFA and IMFB at Compare Match: IMFA and IMFB are set to 1 by a
compare match signal generated when TCNT matches a general register (GR). The compare
match signal is generated in the last state in which the values match (when TCNT is updated from
the matching count to the next count). Therefore, when TCNT matches a general register, the
compare match signal is not generated until the next timer clock input. Figure 10-57 shows the
timing of the setting of IMFA and IMFB.
ø
TCNT input
clock
TCNT
GR
Compare
match signal
IMF
IMI
Figure 10-57 Timing of Setting of IMFA and IMFB by Compare Match
N
362
N
N + 1

Related parts for HD6413003RVF