HD6413003RVF RENESAS [Renesas Technology Corp], HD6413003RVF Datasheet - Page 220

• Manufacturer Part Number: HD6413003RVF
• Description: microcontroller (MCU)
• Manufacturer: RENESAS [Renesas Technology Corp]

The transfer count is specified as a 16-bit value in ETCR. The ETCR value is decremented by 1 at
each transfer. When the ETCR value reaches H'0000, the DTE bit is cleared, the transfer ends, and
a CPU interrupt is requested. The maximum transfer count is 65,536, obtained by setting ETCR to
H'0000.
Transfers can be requested (activated) by compare match/input capture A interrupts from ITU
channels 0 to 3, SCI transmit-data-empty and receive-data-full interrupts, and external request
signals.
For the detailed settings see section 8.2.4, Data Transfer Control Registers (DTCR).
Figure 8-5 shows a sample setup procedure for idle mode.
destination addresses
Set transfer count
Set source and
Read DTCR
Set DTCR
Idle mode
Idle mode
Figure 8-5 Idle Mode Setup Procedure (Example)
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2
3
4
1.
2.
3.
4.
Set the source and destination addresses
in MAR and IOAR. The transfer direction is deter-
mined automatically from the activation source.
Set the transfer count in ETCR.
Read DTCR while the DTE bit is cleared to 0.
Set the DTCR bits as follows.
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Select the DMAC activation source with bits
DTS2 to DTS0.
Set the DTIE and RPE bits to 1 to select idle mode.
Select byte size or word size with the DTSZ bit.
Set the DTE bit to 1 to enable the transfer.
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