HD6413003RVF RENESAS [Renesas Technology Corp], HD6413003RVF Datasheet - Page 203

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HD6413003RVF

Manufacturer Part Number
HD6413003RVF
Description
microcontroller (MCU)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Bit 3—Data Transfer Interrupt Enable (DTIE): Enables or disables the CPU interrupt (DEND)
requested when the DTE bit is cleared to 0.
Bit 3
DTIE
0
1
Bits 2 to 0—Data Transfer Select (DTS2, DTS1, DTS0): These bits select the data transfer
activation source. Some of the selectable sources differ between channels A and B.
Channel A
Bit 2
DTS2A
0
1
Notes: 1. See section 8.3.4, Data Transfer Control Register (DTCR).
2. DMAC channels 0 and 1 accept transmit-data-empty and receive-data-full interrupts
Description
The DEND interrupt requested by DTE is disabled
The DEND interrupt requested by DTE is enabled
Bit 1
DTS1A
0
1
0
1
from SCI channel 0. DMAC channels 2 and 3 accept transmit-data-empty and receive-
data-full interrupts from SCI channel 1.
Bit 0
DTS0A
0
1
0
1
0
1
*1
Description
Compare match/input capture A interrupt from ITU
channel 0
Compare match/input capture A interrupt from ITU channel 1
Compare match/input capture A interrupt from ITU channel 2
Compare match/input capture A interrupt from ITU channel 3
Transmit-data-empty interrupt from SCI channel 0 or 1
Receive-data-full interrupt from SCI channel 0 or 1
Transfer in full address mode
185
*2
*2
(Initial value)
(Initial value)

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