HD6413003RVF RENESAS [Renesas Technology Corp], HD6413003RVF Datasheet - Page 529

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HD6413003RVF

Manufacturer Part Number
HD6413003RVF
Description
microcontroller (MCU)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
17.1 Overview
The H8/3003 has a power-down state that greatly reduces power consumption by halting CPU
functions. The power-down state includes the following three modes:
Table 17-1 indicates the methods of entering and exiting these power-down modes and the status
of the CPU and on-chip supporting modules in each mode.
Table 17-1 Power-Down State
Mode
Sleep
mode
Software
standby
mode
Hardware Low input at
standby
mode
Notes: 1. The refresh timer counter (RTCNT) and bits 7 and 6 of the refresh timer control/status register (RTMCSR) are
Legend
SYSCR: System control register
SSBY:
Sleep mode
Software standby mode
Hardware standby mode
2. The RAME bit must be cleared to 0 in SYSCR before the transition from the program execution state to hardware
Software standby bit
initialized. Other bits and registers hold their previous states.
standby mode.
Entering
Conditions
SLEEP instruc- Active
tion executed
while SSBY = 0
in SYSCR
SLEEP instruc- Halted Halted Held
tion executed
while SSBY = 1
in SYSCR
STBY pin
Clock
Halted Halted Undeter
Section 17 Power-Down State
CPU
Halted Held
CPU
Registers DMAC Controller Functions RAM
mined
Active
Halted Halted
and
reset
Halted Halted
and
reset
511
Refresh
Active
and
held
and
reset
State
*1
Supporting
Active
Halted
and
reset
Halted
and
reset
Held
Held
Held
*2
I/O
Ports
Held
Held
High
impedance • RES
Exiting
Conditions
• Interrupt
• RES
• STBY
• NMI
• IRQ
• RES
• STBY
• STBY
0
to IRQ
2

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