HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 833

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HD6412332

Manufacturer Part Number
HD6412332
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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19.14.3 Erase Block Register 1 (EBR1)
EBR1 is an 8-bit register that specifies the flash memory erase area block by block. EBR1 is
initialized to H'00 by a reset, in hardware standby mode and software standby mode, when a low
level is input to the FWE pin, and when a high level is input to the FWE pin and the SWE bit in
FLMCR1 is not set. When a bit in EBR1 is set, the corresponding block can be erased. Other
blocks are erase-protected. Set only one bit in EBR1 and EBR2 together (setting more than one bit
will automatically clear all EBR1 and EBR2 bits to 0). When on-chip flash memory is disabled, a
read will return H'00 and writes are invalid.
The flash memory block configuration is shown in table 19.28.
19.14.4 Erase Block Registers 2 (EBR2)
EBR2 is an 8-bit register that specifies the flash memory erase area block by block. EBR2 is
initialized to H'00 by a reset, in hardware standby mode and software standby mode, when a low
level is input to the FWE pin, and when a high level is input to the FWE pin and the SWE bit in
FLMCR1 is not set. When a bit in EBR2 is set, the corresponding block can be erased. Other
blocks are erase-protected. Set only one bit in EBR2 and EBR1 together (setting more than one bit
will automatically clear all EBR1 and EBR2 bits to 0). Bits 7 to 4 are reserved; they are always
read as 0 and cannot be modified. When on-chip flash memory is disabled, a read will return H'00,
and writes are invalid.
The flash memory block configuration is shown in table 19.28.
Bit
EBR1
Initial value :
R/W
Bit
EBR2
Initial value :
R/W
:
:
:
:
R/W
EB7
7
0
7
0
EB6
R/W
6
0
6
0
EB5
R/W
5
0
5
0
R/W
EB4
0
0
4
4
Rev.4.00 Sep. 07, 2007 Page 803 of 1210
EB11
R/W
R/W
EB3
3
0
3
0
EB10
EB2
R/W
R/W
2
0
2
0
REJ09B0245-0400
R/W
EB1
R/W
EB9
1
0
1
0
R/W
R/W
EB0
EB8
0
0
0
0

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