HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 635

• Manufacturer Part Number: HD6412332
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

14.2.6
SCR is a register that performs enabling or disabling of SCI transfer operations, serial clock output
in asynchronous mode, and interrupt requests, and selection of the serial clock source.
SCR can be read or written to by the CPU at all times.
SCR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode and
module stop mode it retains its previous state.
Bit 7—Transmit Interrupt Enable (TIE): Enables or disables transmit-data-empty interrupt
(TXI) request generation when serial transmit data is transferred from TDR to TSR and the TDRE
flag in SSR is set to 1.
Bit 7
TIE
0
1
Note:* TXI interrupt request cancellation can be performed by reading 1 from the TDRE flag, then
Bit
Initial value :
R/W
clearing it to 0, or by clearing the TIE bit to 0.
Serial Control Register (SCR)
Description
Transmit-data-empty interrupt (TXI) requests disabled *
Transmit-data-empty interrupt (TXI) requests enabled
:
:
R/W
TIE
7
0
R/W
RIE
6
0
R/W
TE
5
0
R/W
RE
4
0
Rev.4.00 Sep. 07, 2007 Page 605 of 1210
MPIE
R/W
3
0
TEIE
R/W
2
0
REJ09B0245-0400
CKE1
R/W
1
0
(Initial value)
CKE0
R/W
0
0