HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 171

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HD6412332

Manufacturer Part Number
HD6412332
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Bit 4—Burst Cycle Select 1 (BRSTS1): Selects the number of burst cycles for the burst ROM
interface.
Bit 4
BRSTS1
0
1
Bit 3—Burst Cycle Select 0 (BRSTS0): Selects the number of words that can be accessed in a
burst access on the burst ROM interface.
Bit 3
BRSTS0
0
1
Bits 2 to 0—RAM Type Select (RMTS2 to RMTS0): These bits select the memory interface for
areas 2 to 5 in advanced mode.
When DRAM space is selected, the relevant area is designated as a DRAM interface area.
Bit 2
RMTS2
0
1
The LCAS pin is used for the LCAS signal on the 2-CAS DRAM interface. If it is wished to use
BREQO output when using the LCAS signal, it is possible to switch to the P53 pin by means of
the BREQOPS bit in PFCR2. For details, see section 9.6, Port 5 and section 9.16, Port F.
Bit 1
RMTS1
0
1
Description
Burst cycle comprises 1 state
Burst cycle comprises 2 states
Description
Max. 4 words in burst access
Max. 8 words in burst access
Bit 0
RMTS0
0
1
0
1
Area 5
Normal space
Normal space
Normal space
DRAM space
Area 4
Normal space
Normal space
Normal space
DRAM space
Rev.4.00 Sep. 07, 2007 Page 141 of 1210
Description
Area 3
Normal space
Normal space
DRAM space
DRAM space
REJ09B0245-0400
Area 2
Normal space
DRAM space
DRAM space
DRAM space
(Initial value)
(Initial value)

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