HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 457

• Manufacturer Part Number: HD6412332
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

9.16.2
Table 9.30 shows the port F register configuration.
Table 9.30 Port F Registers
Name
Port F data direction register
Port F data register
Port F register
Port function control register 2
System control register
Notes: 1. Lower 16 bits of the address.
Port F Data Direction Register (PFDDR)
Modes 4 to 6
Mode 7
PFDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port F. PFDDR cannot be read; if it is, an undefined value will be read.
PFDDR is initialized by a reset, and in hardware standby mode, to H'80 in modes 4 to 6, and to
H'00 in mode 7. It retains its prior state in software standby mode. The OPE bit in SBYCR is used
to select whether the bus control output pins retain their output state or become high-impedance
when a transition is made to software standby mode.
Bit
Initial value :
R/W
Initial value :
R/W
2. Initial value depends on the mode.
Register Configuration
:
:
:
PF7DDR PF6DDR PF5DDR PF4DDR PF3DDR PF2DDR PF1DDR PF0DDR
W
W
7
1
0
W
W
6
0
0
Abbreviation
PFDDR
PFDR
PORTF
PFCR2
SYSCR
W
W
5
0
0
W
W
0
0
4
R/W
W
R/W
R
R/W
R/W
Rev.4.00 Sep. 07, 2007 Page 427 of 1210
W
W
3
0
0
Initial Value
H'80/H'00 *
H'00
Undefined
H'30
H'01
W
W
2
0
0
2
REJ09B0245-0400
W
W
1
0
0
Address *
H'FEBE
H'FF6E
H'FF5E
H'FFAC
H'FF39
W
W
0
0
0
1