HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 124

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HD6412332

Manufacturer Part Number
HD6412332
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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4.5
Trap instruction exception handling starts when a TRAPA instruction is executed. Trap instruction
exception handling can be executed at all times in the program execution state.
The TRAPA instruction fetches a start address from a vector table entry corresponding to a vector
number from 0 to 3, as specified in the instruction code.
Table 4.4 shows the status of CCR and EXR after execution of trap instruction exception handling.
Table 4.4
Legend:
1: Set to 1
0: Cleared to 0
—: Retains value prior to execution.
4.6
Figure 4.4 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
Rev.4.00 Sep. 07, 2007 Page 94 of 1210
REJ09B0245-0400
Interrupt Control Mode
Trap Instruction
Stack Status after Exception Handling
SP
Figure 4.4 Stack Status after Exception Handling (Advanced Modes)
Status of CCR and EXR after Trap Instruction Exception Handling
0
2
Note: * Ignored on return.
(a) Interrupt control mode 0
(24 bits)
CCR
PC
1
1
I
CCR
SP
UI
(b) Interrupt control mode 2
I2 to I0
(24 bits)
Reserved*
EXR
CCR
PC
EXR
T
0

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