HD6412332 RENESAS [Renesas Technology Corp], HD6412332 Datasheet - Page 493

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HD6412332

Manufacturer Part Number
HD6412332
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Channel
0
Note:
1. When the BFA bit in TMDR0 is set to 1 and TGR0C is used as a buffer register, this
Bit 3
IOC3
0
1
setting is invalid and input capture/output compare is not generated.
Bit 2
IOC2
1
0
0
1
Bit 1
IOC1
0
1
0
1
0
1
*
Bit 0
IOC0 Description
0
0
1
0
1
1
0
1
0
1
*
*
TGR0C
is output
compare
register*
TGR0C
is input
capture
register *
1
1
Output disabled
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCC0 pin
Capture input
source is channel
1/count clock
Rev.4.00 Sep. 07, 2007 Page 463 of 1210
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1 count-
up/count-down
0 output at compare match
1 output at compare match
Toggle output at compare
match
Toggle output at compare
match
0 output at compare match
1 output at compare match
REJ09B0245-0400
(Initial value)
*: Don’t care

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